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Publication : Parametric Timing Analysis and its Application to DVS

Authors : Sibin Mohan, Frank Mueller, William Hawkins, Michael Root, Christopher Healy, David Whalley and Emilio Vivancos.

Abstract :
Embedded Systems with real-time constraints depend on a-priori knowledge of worst-case execution times (WCETs) to determine if tasks meet deadlines. Static timing analysis derives bounds on WCETs but requires statically known loop bounds.

This work removes the constraints on known loop bounds through parametric analysis expressing WCETs as functions. Tighter WCETs are dynamically discovered to exploit slack by dynamic voltage scaling (DVS) saving 60%-80% energy over DVS-oblivious techniques and showing savings close to more costly dynamic-priority DVS algorithms.

Overall, parametric analysis expands the class of real-time applications to programs with loop-invariant dynamic loop bounds while retaining tight WCET bounds.

Here is a link to the full paper.

This has been accepted for publication in the ACM journal Transactions in Embedded Computing Systems (TECS) in 2008.
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